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Just another variation of René Schmitz's CMOS VCO
... now extending itself into CD4046's territory.
I have always wanted to give this linear CMOS VCO approach a try, and the RESET pulse of an sawtooth oscillator (when buffered) makes a nice clock output. The example i built works well, and requiring so few parts, it was too easy to build. |
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CV Exponential Conversion:
There are differences in the implementation of exponential converter for this circuit vrs. René's circuit.
Power: This circuit, intended for integration with companion digital components, is characterised for a single +5Vdc power supply. Typical of single supply circuit configurations, the 'common' rail must be "built out". Targeting +5Vdc power, we adopt a E.Williams approach. We lower the 'common' to a diode drop above negative for maximum usable range. Control Voltage Scaling: This circuit employs the typical PTC thermo-resistor as the "shunt" element of the VCO CV scaling voltage divider. René's circuit employs a novel approach where a NTC thermistor performs as the series element of the voltage divider. In regards to CV to Frequency scaling, a 1V/8ve VCO would employ a 100k input resistor where we presently indicate a 75k. Commonly, either it or the 1.8k thermo-sensitive resistor would have a series trim to allow accurate tuning. As a "Utility oscillator" we select a "fixed" ratio representing a scaling that "felt best" when operating the Panel Control. The scaling shown above is ~ .7V/8ve (75k resistor instead of 100k). |
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VCO Core : The schematic above shows how a single 74HC14 inverting gate comprises the primary component of the oscillator core. The graphic below is an edited o'scope display. 'HC14 gate input (pin #1) depicts as Red, Gate output (pin #2) in Yellow... Following the red trace the integrator cap repeatedly discharges until it reaches just below the 'HC14 schmitt trigger's lower switching threshold. Suddenly, the gate's output (yellow) toggles high, the diode conducts and the capacitor is rapidly refreshed to a level just above the upper switching threshold. Suddenly, the gate's output toggles low. The cap will now exponentially discharge at a rate programmed by VCO Freq. Control Voltage scaling. The waveform depicted by the Red trace is drawing the width of the 74HC14 Hysteresis window, a dead band of ~.9Vdc . RESET has a fixed width (~20nS) which is 6% of wavecycle @ 3MHz. The integrator discharge is programmed into the exponential current sink by the Control Voltage and RANGE trim. |
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This is the typical Integrator-Reset Sawtooth configuration.  It is implemented with HCMOS employing a single gate to; (1)  buffer the integrator capacitor; (2)  act as a switch driver with hysteresis. The diode is the switch. These functions implement in 3 gates in the original design. Inspired by Jürgen Haibles use of CMOS buffers in his "Wasp Filter clone", René Schmitz started a "quiet riot" with the web publication of his "CMOS in linear mode" exponential sawtooth oscillator.  There have been many variation of this VCO approach, why not extend it into the CD4046's territory. |
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The graphic below attempts to show the correlating constituent circuits in common between this and the René Schmitz VCO. |
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